- Code ENGN6213
- Unit Value 6 units
This course provides an introduction to the analysis and design of digital systems and microprocessors. Review of combinational logic analysis and design. Systematic design methods. Analysis and design of synchronous sequential machines. Computer aided design and programming of digital electronic circuits using VHDL hardware description language and FPGA programmable logic devices. Microprocessor and microcomputer architecture. Microprocessor devices, their architecture and instruction sets. Hardware aspects of instruction execution. Assembler and C programming. Input/output, bus interfacing, interrupts. Co-design of digital hardware and microprocessor systems.
Upon successful completion, students will have the knowledge and skills to:
1. Design combinational and sequential logic hardware using schematics and Verilog HDL. Follow an appropriate workflow for digital system design tasks and their implementation in programmable logic.
2. Analyse and design complex digital systems through the Finite State Machine and Register-Transfer-Level frameworks.
3. Demonstrate a solid understanding of basic C and Assembly programming languages in an embedded programming context.
4. Describe the architecture, programming and use of microprocessors and FPGAs, and distinguish appropriate areas of application for each technology.
5. Adopt a top-down design approach to deconstruct a design goal and translate system requirements into a practical design.
6. Plan, execute and report on a project working in a group.
7. Use a number of commercial and open-source softwares: ISE WebPACK, ICARUS Verilog, GTKwave, Atmel Studio.
8. Demonstrate practical electronics testbench skills and use a development board.
9. Interpret schematics and datasheets.
10. Communicate effectively in written form about their work.
Assessment (10%); Midterm Exam (20%); Labs (30%); Exam and Project (40%)
The ANU uses Turnitin to enhance student citation and referencing techniques, and to assess assignment submissions as a component of the University's approach to managing Academic Integrity. While the use of Turnitin is not mandatory, the ANU highly recommends Turnitin is used by both teaching staff and students. For additional information regarding Turnitin please visit the ANU Online website.
Twenty one lectures plus three hours of labs per week
Requisite and Incompatibility
- Text book - John F Wakerly (Digital Design, Principles and Practices, Prentice Hall) - available now in the book shop.
- There is a reading brick from 2008.
There are a number of other texts:
- Vahid and Lysecky (Verilog for Digital Design, Wiley): good for RTL verilog.
- Milos Ercegovac (Introduction to Digital Systems, Wiley. Chs 13-15) good for RTL design but all in VHDL and
- Furber (ARM SoC Architecture, Addison-Wesley): background reading for later on in the course.
Assumed knowledge in the area of electronics and communications
Tuition fees are for the academic year indicated at the top of the page.
If you are a domestic graduate coursework or international student you will be required to pay tuition fees. Tuition fees are indexed annually. Further information for domestic and international students about tuition and other fees can be found at Fees.
- Student Contribution Band:
- Unit value:
- 6 units
If you are an undergraduate student and have been offered a Commonwealth supported place, your fees are set by the Australian Government for each course. At ANU 1 EFTSL is 48 units (normally 8 x 6-unit courses). You can find your student contribution amount for each course at Fees. Where there is a unit range displayed for this course, not all unit options below may be available.
Offerings, Dates and Class Summary Links
ANU utilises MyTimetable to enable students to view the timetable for their enrolled courses, browse, then self-allocate to small teaching activities / tutorials so they can better plan their time. Find out more on the Timetable webpage.
Class summaries, if available, can be accessed by clicking on the View link for the relevant class number.
|Class number||Class start date||Last day to enrol||Census date||Class end date||Mode Of Delivery||Class Summary|
|3172||15 Feb 2016||26 Feb 2016||31 Mar 2016||27 May 2016||In Person||N/A|