• Class Number 4415
  • Term Code 3230
  • Class Info
  • Unit Value 6 units
  • Mode of Delivery In Person
  • COURSE CONVENER
    • Charles Martin
  • Class Dates
  • Class Start Date 21/02/2022
  • Class End Date 27/05/2022
  • Census Date 31/03/2022
  • Last Date to Enrol 28/02/2022
SELT Survey Results

This course lays the foundations for the understanding of CPU architectures, networking and operating systems. Additionally, it introduces topics which cut across many computer systems, such as cross-layer communication and basic concurrency (as well as basic ideas of virtualization and efficiency through proximity).

CPU architectures are discussed from first principles (digital logic) and are expanded into current day designs. This also involves assembler level programming to connect hardware circuits to the world of software. Representations of data types and high-level code at the machine level will be made clear by keeping the relations between high-level and machine-level code throughout the course. It will also look at how concurrent software constructs can or cannot be translated into parallel hardware operations.

This course will cover a wide range of topics such as digital logic: transistors, gates, and combinatorial circuits; clocks; registers and register banks; arithmetic-logic units; data representation: big-endian and littleendian integers; ones and twos complement arithmetic; signed and unsigned values; Von-Neumann architecture and bottleneck; instruction sets; RISC and CISC designs; instruction pipelines and stalls; rearranging code; memory and address spaces; physical and virtual memory; interleaving; page tables; memory caches; bus architecture; polling and interrupts; DMA; device programming; assembly language; optimizations; concurrency and parallelism; and data pipelining.

Knowledge of the principles of networking and operating systems (as well as their relation to computer hardware) are essential for every computer scientist and this course will provide those foundations.

The relation of assembler level building blocks (macros) to constructs in direct compiled language is demonstrated throughout the course.

While this course provides the above foundations (which stand on their own), it also prepares students for the follow-up course COMP2310 Systems, Networks and Concurrency, which rounds off the knowledge about concurrency in current computer systems of any scale, as well as expands the knowledge in networking and operating systems.

Learning Outcomes

Upon successful completion, students will have the knowledge and skills to:

  1. Describe the layers of architectures in computer systems from digital logic to networks.
  2. Explain how the major components of a CPU are composed (in terms of digital logic) and work together (including how data is represented on a computer).
  3. Design, implement and analyse programs in assembly language, including basic synchronization, I/O and interrupt techniques.
  4. Describe the relationship between high-level languages and assembly languages, including function calls and basic control structures.
  5. Demonstrate foundational knowledge about operating systems and networks.
  6. Express simple conditional and functional decomposition in a basic, direct compiled language (such as C).
  7. Connect conceptually hardware and software aspects of computer systems.
  8. Demonstrate the ability to migrate between all essential abstraction levels when discussing computer systems design, ranging from a software oriented view all the way through to individual digital circuits.
  9. Demonstrate a well founded understanding of the implications of machine level choices on efficiency and predictability in the context of the hardware architectures covered in the course.

Research-Led Teaching

In this course, you will learn how computers actually run programs by working with a physical pocket-sized computer system to create expressive and creative programs. This is led by research in creative computing, where similar single-board-computers are used for creating new musical instruments and interactive art installations. In this context, the design choices that go into creating a computer system directly lead to limitations and opportunities for new kinds of interactive experiences.

Examination Material or equipment

Examinations are open-book and any material, including your micro:bit, is permitted.

Note that examinations are strictly individual tasks.

Required Resources

A BBC micro:bit v2 is required to complete this course. This is provided at no charge to students who are physically on ANU campus. Students who will not attend ANU campus should arrange to purchase one separately. See details at: https://cs.anu.edu.au/courses/comp2300/getting-microbit/

There is a list of recommended online resources that is available at: https://cs.anu.edu.au/courses/comp2300/resources/04-books-links/

All other resources are available at: https://cs.anu.edu.au/courses/comp2300/resources/

Staff Feedback

Students will be given feedback in the following forms in this course:

  • written comment
  • verbal comments
  • feedback to whole class, tutorials and online.

Student Feedback

ANU is committed to the demonstration of educational excellence and regularly seeks feedback from students. Students are encouraged to offer feedback directly to their Course Convener or through their College and Course representatives (if applicable). The feedback given in these surveys is anonymous and provides the Colleges, University Education Committee and Academic Board with opportunities to recognise excellent teaching, and opportunities for improvement. The Surveys and Evaluation website provides more information on student surveys at ANU and reports on the feedback provided on ANU courses.

Other Information

The course website can be found at https://cs.anu.edu.au/courses/comp2300

Lectures and labs can be found on this site as can the details of each assignment in the course.


Class Schedule

Week/Session Summary of Activities Assessment
1 Lectures: Introduction & Digital Logic Lab: Introduction to your tools and the micro:bit
2 Lectures: ALU Operations Lab: First machine code
3 Lectures: Memory Operations Lab: Maths to machine code Lab 1-3 tasks are due
4 Lectures: Control Structures Lab: Blinky Quiz 1
5 Lectures: Functions Lab: Lights and Sound Assignment 1 Pre-submission in lab
6 Lectures: Toolchains and the micro:bit Lab: Functions Assignment 1 is due Lab 4-6 tasks are due
7 Lectures: Data Structures Lab: Data structures Mid Semester Exam
8 Lectures: Asynchronism, Interrupts & Concurrency Lab: Input through interrupts part 1
9 Lectures: Networks Lab: Input through interrupts part 2 Lab 7-9 tasks are due Assignment 2 Pre-submission in lab
10 Lectures: Operating Systems Lab: Network connections Quiz 2
11 Lectures: Architectures Lab: Programming in C Assignment 2 is due
12 Lectures: Course Review Lab: DIY operating system Lab 10-12 tasks are due

Tutorial Registration

You must register for a lab session using streams: https://cs.anu.edu.au/streams/

Assessment Summary

Assessment task Value Due Date Return of assessment Learning Outcomes
Assignment 1 20 % 01/04/2022 19/04/2022 3,7,8,9
Assignment 2 20 % 20/05/2022 06/06/2022 3,7,8,9
Mid-Semester Exam 20 % * * 1,2,4,7,8,9
Final Exam 30 % * * 1,2,4,5,7,8,9
Lab Tasks 6 % * * 3,5,6
Quiz 1 & 2 2 % * * 1,2,4,5
Assignment 1 & 2 Pre-submission 2 % * * 3,7

* If the Due Date and Return of Assessment date are blank, see the Assessment Tab for specific Assessment Task details

Policies

ANU has educational policies, procedures and guidelines, which are designed to ensure that staff and students are aware of the University’s academic standards, and implement them. Students are expected to have read the Academic Misconduct Rule before the commencement of their course. Other key policies and guidelines include:

Assessment Requirements

The ANU is using Turnitin to enhance student citation and referencing techniques, and to assess assignment submissions as a component of the University's approach to managing Academic Integrity. For additional information regarding Turnitin please visit the ANU Online website. Students may choose not to submit assessment items through Turnitin. In this instance you will be required to submit, alongside the assessment item itself, hard copies of all references included in the assessment item.

Moderation of Assessment

Marks that are allocated during Semester are to be considered provisional until formalised by the College examiners meeting at the end of each Semester. If appropriate, some moderation of marks might be applied prior to final results being released.

Participation

  • Students are expected to participate in all teaching activities in this course, in particular students are attended to attend all lab sessions. Important help and feedback is provided during labs which is required to complete assessment tasks to a good standard.
  • Some assessment items take place during labs. In order to gain a mark for these items you must attend your assigned lab time.

Examination(s)

This course includes mid-semester and final examinations. These will take place online on Wattle.

Exams will include a mix of multiple choice, code, and written questions.

These examinations are open book and all resources (including your microbit) are permitted.

Examinations are strictly individual tasks. No collaboration of any sort is permitted.

Assessment Task 1

Value: 20 %
Due Date: 01/04/2022
Return of Assessment: 19/04/2022
Learning Outcomes: 3,7,8,9

Assignment 1

This assignment will involve creating a light and sound show on your micro:bit LED display and speaker. The program must meet a specification to be provided on the course website .


The program must be created in ARM-v7 assembly and use the micro:bit's display GPIO outputs and memory to generate a display pattern that changes over time. The program will be accompanied by a design document that explains what your design is (and how it meets the assignment specification), how you accomplished it, and why your design choices were appropriate for the assignment task.


The precise assignment specification and template will be available from the course website during the semester. You must follow the assignment specification for this assignment.


The assignment will be submitted as a GitLab repository including the ARM assembly code and design document. Late submission is not permitted. This is an individual assessment item.


Your assignment will be evaluated on the following criteria:

  1. Sophistication of your design and how it meets the assignment specification. (20%)
  2. Sophistication of your implementation in ARM-v7 assembly language. (50%)
  3. Sophistication of analysis and evaluation of why your implementation is correct and appropriate for your design and what limitations it might have. (20%)
  4. Sophistication of communication and expression. (10%)

Assessment Task 2

Value: 20 %
Due Date: 20/05/2022
Return of Assessment: 06/06/2022
Learning Outcomes: 3,7,8,9

Assignment 2

This assignment will involve creating an interactive program that uses the micro:bit's inputs (buttons and sensors) and outputs (lights and speaker). The program must meet a specification to be provided on the course website . Advanced submissions will also use networking features.


The program must be created in ARM-v7 assembly and use the micro:bit's interrupts, inputs, outputs, and memory. The program will be accompanied by a design document that explains what your design is (and how it meets the assignment specification), how you accomplished it, and why your design choices were appropriate for the assignment task.


The precise assignment specification and template will be available from the course website during the semester. You must follow the assignment specification for this assignment.


The assignment will be submitted as a GitLab repository including the ARM assembly code and design document. Late submission is not permitted. This is an individual assessment item.


Your assignment will be evaluated on the following criteria:

  1. Sophistication of your design and how it meets the assignment specification. (20%)
  2. Sophistication of your implementation in ARM-v7 assembly language. (50%)
  3. Sophistication of analysis and evaluation of why your implementation is correct and appropriate for your design and what limitations it might have. (20%)
  4. Sophistication of communication and expression. (10%)

Rubric

Assessment Task 3

Value: 20 %
Learning Outcomes: 1,2,4,7,8,9

Mid-Semester Exam

The mid-semester exam will take place on Wattle during the mid-semester exam period. It is open book and all materials are allowed, however you must not collaborate with others on this assessment. The exam will include a mix of multiple choice, code, and written questions.



Assessment Task 4

Value: 30 %
Learning Outcomes: 1,2,4,5,7,8,9

Final Exam

The final exam will take place on Wattle during the final exam period. It is open book and all materials are allowed, however you must not collaborate with others on this assessment. The exam will include a mix of multiple choice, code, and written questions.

Assessment Task 5

Value: 6 %
Learning Outcomes: 3,5,6

Lab Tasks

The labs are the most important learning activity in this course. In each lab you will complete a number of tasks that involve creating and testing small programs on your micro:bit. Some of these tasks are required parts of the course (lab tasks) and some are not required but provided to challenge your knowledge and understanding (extension tasks).


Your lab tasks will be marked periodically during the semester, ideally you will complete your lab tasks during each lab or shortly after. Each lab will be worth 0.5 marks for a total of 6 marks over the semester. To receive a mark for a lab you must have completed lab tasks by the next marking deadline. You are encouraged and required to collaborate in labs, but you should note the details of your collaborations in your gitlab repository and each student must upload their work individually.


To obtain the full 0.5 marks for each lab, you must have completed all of the lab tasks, as noted in each lab page and uploaded your solutions to gitlab. Extension tasks are not marked. The precise submission details, and template will be available from the course website during the semester.


The submission deadlines will be:

  • End of Week 3 (labs 1-3)
  • End of Week 6 (labs 4-6)
  • End of Week 9 (labs 7-9)
  • End of Week 12 (labs 10-12)


Rubric

MarkStandard

0.5

Forked/cloned lab template and completed all lab tasks.

0.25

Forked/cloned lab template and completed some lab tasks.

0

Lab template was not forked/cloned and/or no lab tasks were completed.

Assessment Task 6

Value: 2 %
Learning Outcomes: 1,2,4,5

Quiz 1 & 2

Quiz 1 & 2 will take place on Wattle. These will be open book and all materials are allowed. The quizzes will include multiple choice questions. Each quiz is worth 1 mark.


These quizzes represent important feedback on your progress in the course.


The dates for these quizzes are:

  • Quiz 1: Available anytime in week 4
  • Quiz 2: Available anytime in week 10

Assessment Task 7

Value: 2 %
Learning Outcomes: 3,7

Assignment 1 & 2 Pre-submission

This assessment task requires students to begin planning their assignment. This will be conducted in lab and will be worth 1 mark for each assignment.

You will need to fork and clone the assignment template repository and fill in a design proposal (200 words or fewer) that outlines what your planned design is and how you will accomplish it.


The precise pre-submission details and template will be available from the course website during the semester.


The dates for assignment pre-submission are:

  • Assignment 1 Pre-submission: Due by the start of your week 5 lab.
  • Assignment 2 Pre-submission: Due by the start of your week 9 lab.

Rubric

MarkStandard

1

Has forked/cloned assignment template. Design proposal includes an excellent effort to describe a design. The sophistication of the described design is at an excellent standard.

0.75

Has forked/cloned assignment template. Design proposal includes a very good effort to describe a design. The sophistication of the described design is at a very good standard.

0.5

Has forked/cloned assignment template. Design proposal includes a satisfactory effort to describe a design. The sophistication of the described design is at an acceptable/good standard.

0.25

Has forked/cloned assignment template. Design proposal includes a minimal effort to describe a design. The sophistication of the described design is below our acceptable standard.

0

Has not forked/cloned assignment template or has forked/cloned but there is minimal to describe a potential assignment solution.

Academic Integrity

Academic integrity is a core part of our culture as a community of scholars. At its heart, academic integrity is about behaving ethically. This means that all members of the community commit to honest and responsible scholarly practice and to upholding these values with respect and fairness. The Australian National University commits to embedding the values of academic integrity in our teaching and learning. We ensure that all members of our community understand how to engage in academic work in ways that are consistent with, and actively support academic integrity. The ANU expects staff and students to uphold high standards of academic integrity and act ethically and honestly, to ensure the quality and value of the qualification that you will graduate with. The University has policies and procedures in place to promote academic integrity and manage academic misconduct. Visit the following Academic honesty & plagiarism website for more information about academic integrity and what the ANU considers academic misconduct. The ANU offers a number of services to assist students with their assignments, examinations, and other learning activities. The Academic Skills and Learning Centre offers a number of workshops and seminars that you may find useful for your studies.

Online Submission

Assignments will be submitted through ANU Teaching GitLab. You will be required to electronically sign a declaration as part of the submission of your assignment. Please keep a copy of the assignment for your records.

Hardcopy Submission

Hardcopy submissions will not be accepted.

Late Submission

Late submission of assessment pieces are not accepted without an extension.

Referencing Requirements

Accepted academic practice for referencing sources that you use in presentations can be found via the links on the Wattle site, under the file named “ANU and College Policies, Program Information, Student Support Services and Assessment”. Alternatively, you can seek help through the Students Learning Development website.

Returning Assignments

Assignments will be returned via ANU Teaching GitLab, see the course website for details.

Extensions and Penalties

Extensions and late submission of assessment pieces are covered by the Student Assessment (Coursework) Policy and Procedure. The Course Convener may grant extensions for assessment pieces that are not examinations or take-home examinations. If you need an extension, you must request an extension in writing on or before the due date. If you have documented and appropriate medical evidence that demonstrates you were not able to request an extension on or before the due date, you may be able to request it after the due date.

Resubmission of Assignments

Assignments may not be resubmitted.

Privacy Notice

The ANU has made a number of third party, online, databases available for students to use. Use of each online database is conditional on student end users first agreeing to the database licensor’s terms of service and/or privacy policy. Students should read these carefully. In some cases student end users will be required to register an account with the database licensor and submit personal information, including their: first name; last name; ANU email address; and other information.
In cases where student end users are asked to submit ‘content’ to a database, such as an assignment or short answers, the database licensor may only use the student’s ‘content’ in accordance with the terms of service – including any (copyright) licence the student grants to the database licensor. Any personal information or content a student submits may be stored by the licensor, potentially offshore, and will be used to process the database service in accordance with the licensors terms of service and/or privacy policy.
If any student chooses not to agree to the database licensor’s terms of service or privacy policy, the student will not be able to access and use the database. In these circumstances students should contact their lecturer to enquire about alternative arrangements that are available.

Distribution of grades policy

Academic Quality Assurance Committee monitors the performance of students, including attrition, further study and employment rates and grade distribution, and College reports on quality assurance processes for assessment activities, including alignment with national and international disciplinary and interdisciplinary standards, as well as qualification type learning outcomes.

Since first semester 1994, ANU uses a grading scale for all courses. This grading scale is used by all academic areas of the University.

Support for students

The University offers students support through several different services. You may contact the services listed below directly or seek advice from your Course Convener, Student Administrators, or your College and Course representatives (if applicable).

Charles Martin
u4110680@anu.edu.au

Research Interests


music technology, creative AI, human-computer interaction

Charles Martin

Responsible Officer: Registrar, Student Administration / Page Contact: Website Administrator / Frequently Asked Questions