• Class Number 2420
  • Term Code 3230
  • Class Info
  • Unit Value 6 units
  • Mode of Delivery In Person
    • Prof Thushara Abhayapala
    • Dr Jihui (Aimee) Zhang
    • Prof Thushara Abhayapala
    • Akram Shafie
    • Hanwen Bi
    • Jiarui Wang
    • Manish Kumar
  • Class Dates
  • Class Start Date 21/02/2022
  • Class End Date 27/05/2022
  • Census Date 31/03/2022
  • Last Date to Enrol 28/02/2022
    • Samuel Inzinger
SELT Survey Results

This course introduces advanced theoretical and technical knowledge of digital circuits and embedded systems. Digital systems and embedded systems are at the heart of almost all modern mechatronics and electronics technologies, ranging from smartphones to autonomous vehicle technologies. This course will first focus on sequential logic circuits, also called finite-state-machine, by utilising field-programmable-gate-array boards and a hardware-description language. The second focus will be on embedded system design using a microprocessor and programming. Through the term projects, students will design working embedded systems, then critically analyse and evaluate the erformance of the systems. The course will also develop advanced cognitive, technical and communication skills to solve complex design problems.

Learning Outcomes

Upon successful completion, students will have the knowledge and skills to:

  1. Explain the fundamental principles of sequential digital circuits and finite state machines.
  2. Compare and describe the architecture and fundamental concepts of modern embedded microprocessor systems.
  3. Design complex digital systems using schematics and Verilog HDL, and implement these on commercial-grade field-programmable gate array (FPGA) development boards.
  4. Design an embedded system using C/C++ programming and microcontroller boards.
  5. Analyse critically, and evaluate the performance of systems against the design requirements.
  6. Plan, execute and report on a small project working in a group, communicating effectively in written form about their work.

Research-Led Teaching

The course will have industry guest lecturers and extension tutorials. The projects will be modelled from real world applications and stretch creativity of students.

Required Resources

The course is heavy on the practical hands-on side of engineering embedded systems.

All students are strongly encouraged to download and installed required software in their own PCs so that they can self learn and complete major tasks (Labs and Projects) outside of ANU Labs. Check Wattle for the required software (all software used are commercial software but free to download for students). Installing software takes time, thus, we encourage students do them before the start of week 1.

Remote students may need to source the required hardware (See Wattle for detail) and download software.

Whether you are on campus or studying remotely, there are a variety of online platforms you will use to participate in your study program. These could include videos for lectures and other instruction, two-way video conferencing for interactive learning, email and other messaging tools for communication, interactive web apps for formative and collaborative activities, print and/or photo/scan for handwritten work and drawings, and home-based assessment.

ANU outlines recommended student system requirements to ensure you are able to participate fully in your learning. Other information is also available about the various Learning Platforms you may use.

ENGN 4213/ ENGN6213 specific online resources can be accessed via course Wattle page.

Staff Feedback

Students will be given feedback in the following forms in this course:

  • written comments
  • verbal comments
  • feedback to whole class, groups, individuals, focus group etc

Student Feedback

ANU is committed to the demonstration of educational excellence and regularly seeks feedback from students. Students are encouraged to offer feedback directly to their Course Convener or through their College and Course representatives (if applicable). Feedback can also be provided to Course Conveners and teachers via the Student Experience of Learning & Teaching (SELT) feedback program. SELT surveys are confidential and also provide the Colleges and ANU Executive with opportunities to recognise excellent teaching, and opportunities for improvement.

Class Schedule

Week/Session Summary of Activities Assessment
1 Lecture A: Course introduction (potential VL0)Transistors & combinational logic Lecture B: Guest lecture (CEA) Video Lecture (VL1) - Nonideal behaviour Lab 1: Vivado, simple combinational logic (adder, mux)
2 Video Lecture (VL2) - Sequential logic· Video Lecture (VL) – Essential sequential designs Lecture A: Digital design flow Lecture B: Extension session on sequential designs Lab 2: Sequential logic (counter, heartbeat, clock devision) Tutorial 1
3 VL4 – Introducing Verilog· VL5 – Verilog (continued) A: Extension session on Verilog B: Extension session on Verilog Lab 3 Verilog (Seven segment display, debouncer, SPOT) Tutorial 2 Extension T 1 (By an industry partner)
4 VL6 – Finite state machines A: Extension session on finite state machines B: Extension session on finite state machines Lab 4: FSM Tutorial 3 Extension T 2 (By an industry partner)
5 VL7 – Practical aspects of design· VL8 – RAM and ROM memories A: Practical/RAM ROM B: Possible guest lecture Lab 5: a complex design (Digital Door Access System) Tutorial 4 Extension T 3 (By an industry partner)
6 A: Wrap-up of FPGA concepts; FPGA vs Micros B: Possible guest lecture FPGA Project Drop-in sessions
7 A: Introduction to STM32 (VL1) B: STM32: Timer VL9: Introduction to STM32: GPIO and Interrupt VL10: C Revision FPGA Project demo: Tuesday,Wednesday tutorial time FPGA Project Report submission: Thursday night Lab 6: GPIO, Interrupt
8 A: STN32: Serial communication UART B: STM32: Serial communication I2C VL11: STM32: Timer VL12: STM32: Serial Communication basic Lab 7: UART, Timer Tutorial 5: Basic C
9 A: STM32: Serial communication SPI B: Serial communication Q&A Lab 8: I2C Tutorial 6: Advanced C
10 A: STM32: ADC DMA 1 B: STM32: ADC DMA 2 VL13: STM32: basic ADC Tutorial 7: Everything before ADC (Timer) MCU Project Drop-in Sessions (use lab time)
11 A: Real-time processing B: STM32 wrap-up Q&A Tutorial 8: ADC,DMA MCU Project Drop-in Sessions (use lab time)
12 A: Possible guest lecture – follow announcements VL14: Course wrap-up Exam drop-in sessions (tutorial tutors) MCU project Drop-in Sessions (use lab time)
13 MCU Project Demonstration MCU Project Report submission

Tutorial Registration

Please follow the instructions from the Wattle Course page for ENGN4213 for Lab and Tutorial registrations. ENGN4213 and ENGN6213 are co-badged but have different levels of assessments.

Assessment Summary

Assessment task Value Due Date Learning Outcomes
Embedded Hardware Labs 20 % * 3, 4, 5
FPGA Project 28 % 19/04/2022 3, 5, 6
C Quiz 4 % * 4
Micro-controller Project 28 % 02/06/2022 2, 4, 5
Final Exam 20 % * 1, 2, 5

* If the Due Date and Return of Assessment date are blank, see the Assessment Tab for specific Assessment Task details


ANU has educational policies, procedures and guidelines , which are designed to ensure that staff and students are aware of the University’s academic standards, and implement them. Students are expected to have read the Academic Integrity Rule before the commencement of their course. Other key policies and guidelines include:

Assessment Requirements

The ANU is using Turnitin to enhance student citation and referencing techniques, and to assess assignment submissions as a component of the University's approach to managing Academic Integrity. For additional information regarding Turnitin please visit the Academic Skills website. In rare cases where online submission using Turnitin software is not technically possible; or where not using Turnitin software has been justified by the Course Convener and approved by the Associate Dean (Education) on the basis of the teaching model being employed; students shall submit assessment online via ‘Wattle’ outside of Turnitin, or failing that in hard copy, or through a combination of submission methods as approved by the Associate Dean (Education). The submission method is detailed below.

Moderation of Assessment

Marks that are allocated during Semester are to be considered provisional until formalised by the College examiners meeting at the end of each Semester. If appropriate, some moderation of marks might be applied prior to final results being released.

Assessment Task 1

Value: 20 %
Learning Outcomes: 3, 4, 5

Embedded Hardware Labs

This course has 8 hands-on embedded labs (5 based on FPGAs and 3 on Micro-controllers). Each Lab is assessed individually and worth

Lab1 - 1%

Lab 2 - 2%

Lab 3 - 2%

Lab 4 - 3%

Lab 5 - 3%

Lab 6 - 3%

Lab 7 - 3%

Lab 8 - 3%

Students have the option of doing lab activities in the physical lab or at home. For this to happen, every student needs to have access to hardware and required software installed in an appropriate computer. Lab demonstrators are available in the physical lab (and zoom for remote students who can't make to the lab due to Covid-19 restrictions) during scheduled lab sessions for advice and assessments. Lab instruction sheets will be provided at least one week ahead, and the students are encouraged to attempt the labs before their session at home. Lab activities are attached to a mark component. To obtain these marks, students must attend their allocated lab session in the physical lab (via Zoom for remote students) and show their completed activities before the end of the session.

We believe that by having the necessary hardware and software with you, you will get better hands-on experience and learning outcomes from the labs and the follow-up projects.  


Lab marks are not awarded in response to assessment-style questions but rather on completion of tasks. In the past, a thorough read of lab documents ahead of each session assists greatly in the successful completion of lab tasks. You have the opportunity to attempt and even complete the labs before the session. 

Any work or notes related to the lab should be done on the ‘Lab notebook’.  It does not have to be neat but do not rip pages out of it – just cross it out. Your lab demonstrator might ask you to show the notebook in some instances.   

Assessment Task 2

Value: 28 %
Due Date: 19/04/2022
Learning Outcomes: 3, 5, 6

FPGA Project

Independent development of an embedded solution using an FPGA development board. Project work will be conducted in groups of 2 students and will involve hands-on work.  The project group needs to demonstrate their system and submit a single report. Both demonstration and the report will be assessed.

ENGN6213 students will have additional tasks compared to ENGN4213 students.

Assessment Task 3

Value: 4 %
Learning Outcomes: 4

C Quiz

Students will be expected to work through a C Primer document with concepts and exercises over 5 weeks. The exercises for each week are not graded. Students will be able to complete a weekly online quiz on Wattle to self-evaluate their understanding. Quizzes are graded but not recorded in the student's grade book. It is possible to take a quiz as many times as needed. You need a working knowledge of C Programming to complete the Micro-controller labs and the project. 

Assessment (C Quiz) will be in Week 9-10, by way of a final randomised multiple-choice quiz on Wattle. The questions in the final quiz will be similar to the ones asked during the 5 weeks of self-learning.  

Assessment Task 4

Value: 28 %
Due Date: 02/06/2022
Learning Outcomes: 2, 4, 5

Micro-controller Project

Independent development of an embedded solution using ARM Cortex Micro-controller board. The project may be taken by individuals or a group of two and will involve hands-on work.  The project group needs to demonstrate their system and submit a report. Both demonstration and the report will be assessed.

ENGN6213 students will have additional tasks compared to ENGN4213 students.

Assessment Task 5

Value: 20 %
Learning Outcomes: 1, 2, 5

Final Exam

The aim of the exam is to assess some theoretical concepts and understanding beyond the practical work.

ENGN6213 students will have one extended question that will be different from the undergraduate cohort.

ENGN6213 students will have at least one question different to ENGN4213 students.

Academic Integrity

Academic integrity is a core part of the ANU culture as a community of scholars. The University’s students are an integral part of that community. The academic integrity principle commits all students to engage in academic work in ways that are consistent with, and actively support, academic integrity, and to uphold this commitment by behaving honestly, responsibly and ethically, and with respect and fairness, in scholarly practice.

The University expects all staff and students to be familiar with the academic integrity principle, the Academic Integrity Rule 2021, the Policy: Student Academic Integrity and Procedure: Student Academic Integrity, and to uphold high standards of academic integrity to ensure the quality and value of our qualifications.

The Academic Integrity Rule 2021 is a legal document that the University uses to promote academic integrity, and manage breaches of the academic integrity principle. The Policy and Procedure support the Rule by outlining overarching principles, responsibilities and processes. The Academic Integrity Rule 2021 commences on 1 December 2021 and applies to courses commencing on or after that date, as well as to research conduct occurring on or after that date. Prior to this, the Academic Misconduct Rule 2015 applies.


The University commits to assisting all students to understand how to engage in academic work in ways that are consistent with, and actively support academic integrity. All coursework students must complete the online Academic Integrity Module (Epigeum), and Higher Degree Research (HDR) students are required to complete research integrity training. The Academic Integrity website provides information about services available to assist students with their assignments, examinations and other learning activities, as well as understanding and upholding academic integrity.

Online Submission

You will be required to electronically sign a declaration as part of the submission of your assignment. Please keep a copy of the assignment for your records. Unless an exemption has been approved by the Associate Dean (Education) submission must be through Turnitin.

Hardcopy Submission

For some forms of assessment (hand written assignments, art works, laboratory notes, etc.) hard copy submission is appropriate when approved by the Associate Dean (Education). Hard copy submissions must utilise the Assignment Cover Sheet. Please keep a copy of tasks completed for your records.

Late Submission

Individual assessment tasks may or may not allow for late submission. Policy regarding late submission is detailed below:

  • Late submission not permitted. If submission of assessment tasks without an extension after the due date is not permitted, a mark of 0 will be awarded.
  • Late submission permitted. Late submission of assessment tasks without an extension are penalised at the rate of 5% of the possible marks available per working day or part thereof. Late submission of assessment tasks is not accepted after 10 working days after the due date, or on or after the date specified in the course outline for the return of the assessment item. Late submission is not accepted for take-home examinations.

Referencing Requirements

The Academic Skills website has information to assist you with your writing and assessments. The website includes information about Academic Integrity including referencing requirements for different disciplines. There is also information on Plagiarism and different ways to use source material.

Extensions and Penalties

Extensions and late submission of assessment pieces are covered by the Student Assessment (Coursework) Policy and Procedure. Extensions may be granted for assessment pieces that are not examinations or take-home examinations. If you need an extension, you must request an extension in writing on or before the due date. If you have documented and appropriate medical evidence that demonstrates you were not able to request an extension on or before the due date, you may be able to request it after the due date.

Privacy Notice

The ANU has made a number of third party, online, databases available for students to use. Use of each online database is conditional on student end users first agreeing to the database licensor’s terms of service and/or privacy policy. Students should read these carefully. In some cases student end users will be required to register an account with the database licensor and submit personal information, including their: first name; last name; ANU email address; and other information.
In cases where student end users are asked to submit ‘content’ to a database, such as an assignment or short answers, the database licensor may only use the student’s ‘content’ in accordance with the terms of service – including any (copyright) licence the student grants to the database licensor. Any personal information or content a student submits may be stored by the licensor, potentially offshore, and will be used to process the database service in accordance with the licensors terms of service and/or privacy policy.
If any student chooses not to agree to the database licensor’s terms of service or privacy policy, the student will not be able to access and use the database. In these circumstances students should contact their lecturer to enquire about alternative arrangements that are available.

Distribution of grades policy

Academic Quality Assurance Committee monitors the performance of students, including attrition, further study and employment rates and grade distribution, and College reports on quality assurance processes for assessment activities, including alignment with national and international disciplinary and interdisciplinary standards, as well as qualification type learning outcomes.

Since first semester 1994, ANU uses a grading scale for all courses. This grading scale is used by all academic areas of the University.

Support for students

The University offers students support through several different services. You may contact the services listed below directly or seek advice from your Course Convener, Student Administrators, or your College and Course representatives (if applicable).

Prof Thushara Abhayapala

Research Interests

Audio and Acoustic Signal Processing

Prof Thushara Abhayapala

By Appointment
By Appointment
Dr Jihui (Aimee) Zhang

Research Interests

Dr Jihui (Aimee) Zhang

By Appointment
Prof Thushara Abhayapala

Research Interests

Prof Thushara Abhayapala

By Appointment
By Appointment
Samuel Inzinger

Research Interests

Samuel Inzinger

By Appointment
Akram Shafie

Research Interests

Akram Shafie

By Appointment

Research Interests


By Appointment
Hanwen Bi

Research Interests

Hanwen Bi

By Appointment
Jiarui Wang

Research Interests

Jiarui Wang

By Appointment
Manish Kumar

Research Interests

Manish Kumar

By Appointment

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